NAU Electrical Engineering
Dr. Phillip A. Mlsna







Syllabus: EE 210
Introduction to Digital Logic

SEMESTER: Fall 2003

CREDIT HOURS: 4.0  (3 lecture + 1 lab)

You are required to take EE 210 lecture and laboratory concurrently. You will receive a single, combined grade for lecture and lab.

CLASS TIMES
Course number 3963 lecture: T-Th, 11:10-12:25, room 245
Lab: W, 3:00 - 5:30, room 265

Lab instructor: Mr. Abe Pralle

REQUIRED TEXT: "Digital Design with CPLD Applications and VHDL," Robert K. Dueck, Delmar Thompson Learning, 2001, ISBN 0-7668-1160-3.

Lectures will sometimes include material not found in the textbook. You are responsible for all material discussed in class or assigned in the text.

COURSE COREQUISITE:
The successful completion, with a C or better, of EE 188 and EE 188L - Electrical Engineering I and lab. Some familiarity with basic electric circuits and test instruments is necessary to succeed in this course. Providing false information about prerequisites (i.e. incorrectly claiming that you have met the prerequisites) will be considered academic dishonesty.

COURSE DESCRIPTION:
Design of digital subsystems using individual components, MSI, and LSI circuits, design of state machines.

COURSE GOAL:
A good overview and understanding of digital logic principles, applications, analysis, and design.

ACCREDITATION BOARD FOR ENGINEERING AND TECHNOLOGY
ABET Professional Requirements contribution of this course: 3 credits of engineering science.

This course is designed to meet the following ABET learning objectives and outcomes:

Objective 1: Students will be able to use knowledge and skills in computer science to support their professional activities.
Outcome 1.3: Students acquire knowledge of the theoretical foundations. (M)
Outcome 1.5: Students acquire knowledge of computer organization and architecture. (L)

Objective 3: Students will be able to function professionally with strengths in design, problem solving, communications, and teaming.
Outcome 3.2: Students learn to identify, formulate, and solve computer science and engineering problems. (M)
Outcome 3.3: Students learn to use the techniques, skills, and modern engineering tools necessary for computer science and engineering practice. (L)

(L) = light emphasis, (M) = moderate emphasis, (H) = heavy emphasis

TOPICS AND OBJECTIVES (E = Exposure, U = Utility, M = Mastery)

Binary representation of information U
Basic logic devices M
Boolean Algebra postulates, DeMorgan's theorems U
Algebraic simplification of Boolean expressions U
Karnaugh map simplification of Boolean expressions M
Combinational logic analysis and design M
Flip-flops (RS, D, T, JK) and registers M
Tri-state gates U
Timing diagrams U
Sequential machine analysis and design M
Finite-state machine design U
Introduction to programmable logic E


COURSE GRADING
The course grade will be based upon two mid-term exams, homework, quizzes, and a comprehensive final exam. Grades will be based not only on technical content but also on presenting your work in a well organized, neat, clear, and professional manner using standard technical terms and symbols.

Exam 1 100 pts @ approx. the 6th week
ABET outcomes 1.3 (M), 3.2 (L)
Exam 2 100 @ approx. the 11th week
ABET outcomes 1.5 (L), 3.2 (M), 3.3 (L)
Final Exam 150 ABET outcomes 1.3 (M), 1.5 (L), 3.2 (M), 3.3 (L)
Quizzes 50 10 points each, only the best five scores count
Homework 100  
TOTAL 500  


Final grades will be determined by the following percentages:
    A = 90+, B = 80-89, C = 70-79, D = 60-69, F = below 60
At the instructor's discretion, grading thresholds may be relaxed slightly.

LATE WORK
Assignments are not accepted late. No makeup exams will be given except by prior arrangement in exceptional, unavoidable, emergency situations. Please contact me immediately if such a situation arises.

QUIZZES
During at least 6 regular class periods throughout the semester, a short quiz will be given. These quizzes are worth 10 points each, but only your 5 highest quiz scores will count toward your final grade. The remainder will be dropped. Quizzes will not be announced in advance. Also, they may occur anytime during the class period: beginning, middle, or end. If you are not present when a quiz is given, you will receive a zero for that quiz. No make-up quizzes will be allowed under any circumstances. Suggested strategy: keep current and be ready.

ACADEMIC DISHONESTY
Incidents of cheating or plagiarism are treated quite seriously. The NAU policy on academic dishonesty in Appendix G of the current Student Handbook will apply.

NEED EXTRA HELP?
I want you to succeed in this course! I'm willing to help you in any reasonable way I can. If you're beginning to have difficulty, please contact me before the situation deteriorates.

STANDARD UNIVERSITY POLICIES also apply:
· Safe Environment
· Students with Disabilities
· Accommodation of Religious Observance and Practice
· Institutional Review Board (use of human subjects)
· Classroom Management
· Academic Integrity
· Evacuation


LECTURE OUTLINE
Although the lectures will generally follow the material in the text, we will skip certain material on occasion. The schedule below may change somewhat.

Week Topic Text Reference
1 Course overview, digital concepts, number systems Ch. 1
2 Arithmetic, base conversions, computer codes Ch. 1, 6.1 - 6.4
3 Logic functions, gates, basic Boolean expressions Ch. 2
4 Gates, properties, Boolean algebra Ch. 2 & 3
5 Boolean theorems, combinational logic, simplification Ch. 3
6 Karnaugh maps, hazards, EXAM #1 Ch. 3
7 Combinational logic functions Ch. 5
8 Arithmetic circuits Ch. 6
9 Introduction to sequential logic, flip-flops Ch. 7
10 Timing diagrams Ch. 7
11 EXAM #2 Ch. 7
12 Modular sequential logic Ch. 9
13 Sequential analysis, finite-state machines (FSM) Ch. 9 & 10
14 FSM design, programmable logic Ch. 10 & 8
15 Practical logic circuitry Ch 11
16 Final Exam:  

A workbench used in the laboratory portion of this course

 

An important lab tool, the mixed-signal oscilloscope

 

Published on Wed Aug 20 2003
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